Date / Hour
Date(s) - 27/10/2020 - 28/10/2020
The Design and Verification Conference in Europe (DVCon Europe) is the leading European event covering the application of languages, tools and intellectual property for the design and verification of electronic systems and integrated circuits. DVCon Europe brings chip architects, design and verification engineers, and IP integrators the latest methodologies, techniques, applications and demonstrations for the practical use of EDA solutions for electronic design.
DVCon Europe includes keynote speeches, panel sessions, a broad range of technical paper presentations, tutorials and an exhibition with demonstrations from leading tool, IP and service providers. This year, the event is available online and virtual.
During the Tutorial session on Hybrid System Simulation Standards – Purposes, Practices, and Challenges for Interoperable Simulations, SPACEBEL will do a presentation on SMP standards.
More details and registration: www.dvcon-europe.org.